Boosting performance of multidimensional tores

Abstract

This paper suggests a speed boosting technique for system area networks in massive parallel multiprocessor computers by decreasing the diameter and increasing the throughput of a pair of opposite simplex rings (a duplex ring), a couple and quadruple of such rings. The result is achieved through replacing a duplex ring with a pair of minimal switched multidimensional rings with different steps in each ring. The decreased diameter and increased throughput of rings appreciably reduce packet delivery delays in system area networks based on the pairs of such rings.