New structures of the concurrent error detection systems for logic circuits

Abstract

Proposed were new structures for concurrent error detection systems of the combinatorial logic circuits based on the codes with summation of the weighted transitions and their modifications. They were compared with the traditional systems of duplication and check by the Berger code. The structure based on the code with summation of the weighted transitions allowed one to improve the index of realization complexity as compared with the duplication system by 4 % on the average. The structure obtained by modifying the code with summation of the weighted transitions into the optimal code enables one to improve this index almost twice as much as compared with the system of checking by the Berger code. At that, this system has a better index of error detection. In certain cases, the structure of the concurrent error detection system on the basis of the optimal code is superior in complexity to the system of parity check.