A System for Logical Design of Custom CMOS VLSI Functional Blocks with Reduced Power Consumption

P. N. Bibilo; N. A. Avdeev; S. N. Kardash; N. A. Kirienko; Yu. Yu. Lankevich; I. P. Loginova; V. I. Romanov; D. I. Cheremisinov; L. D. Cheremisinova

doi:10.1134/S106373971801002X

A System for Logical Design of Custom CMOS VLSI Functional Blocks with Reduced Power Consumption

Authors: Bibilo P.N.¹, Avdeev N.A.¹, Kardash S.N.¹, Kirienko N.A.¹, Lankevich Y.Y.¹, Loginova I.P.¹, Romanov V.I.¹, Cheremisinov D.I.¹, Cheremisinova L.D.¹
Affiliations:
1. United Institute of Informatics Problems
Issue: Vol 47, No 1 (2018)
Pages: 65-81
Section: Article
URL: https://journal-vniispk.ru/1063-7397/article/view/186786
DOI: https://doi.org/10.1134/S106373971801002X
ID: 186786

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Abstract

We describe a CMOSLD system to automate the design of irregular logic circuits of CMOS library elements. The main criteria of circuits optimization are the area and the power consumption. This system is integrated with software packages Questa Sim, LeonardoSpectrum, and Accusim II (Mentor Graphics). This makes it possible to perform efficiently logical simulation, synthesis, resynthesis and estimation of energy consumption based on logical and circuit simulation.