Comparative Analysis of Double Gate Junction Less (DG JL) and Gate Stacked Double Gate Junction Less (GS DG JL) MOSFETs


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The quest for downscaling of devices has led to novel configurations with better performance parameters of which Junction Less (JL) MOSFET is an important configuration regarding its applicability. The JL MOSFETs have been analyzed for the physics behind its operation but a comparative study with the practically available devices is important from the point of view of further studies under the topic of JL MOSFETs. Further, the analytical modelling of GS DG JL MOSFETs is an analysis of crucial importance which has been discussed here.

作者简介

Shrey Arvind Singh

Motilal Nehru National Institute of Technology

Email: shtri@mnnit.ac.in
印度, Allahabad, Prayagraj, 211004

Shweta Tripathi

Motilal Nehru National Institute of Technology

编辑信件的主要联系方式.
Email: shtri@mnnit.ac.in
印度, Allahabad, Prayagraj, 211004

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